Circuit Layout
Due to the high sensitivity of the A111, care should be taken in circuit layout. In general, ground plane construction is recommended, with all ground Pins (1,3,4,6,10,11, and 9) connected to this plane. Input and output lines should be kept well separated and in most cases shielding will be necessary. Particular attention should be paid to the detector ground connection to avoid multiple pulsing and oscillation due to feedback. The supply voltage is internally decoupled which prevents the A111 from responding to supply line transients of up to 100 mV amplitude. While this is normally adequate, in some applications external bypassing (typically 10 nF) may be helpful. The PC21 may be used as an example of appropriate layout techniques.
Power Supply
While specifications are given for operation at +5 V, the characteristics of the A111 are relatively unaffected by changes in supply voltage from 4 to 10V. Parameters critical to a particular application should be checked at the actual operating voltage.
Input
The A111 has an internal input protection network, including a coupling capacitor, as shown below. However, it is not possible to fully protect against high voltage discharge through the input.
Two precautions should be kept in mind:
1. The detector anode should normally be capacitively coupled to Pin 12 with a capacitor of adequate voltage rating such that it cannot break down under operating conditions. In some applications, where the detector cathode is operated at negative potential, the anode can be directly connected to Pin 12.
2. When the detector bias is turned on, the rise of high voltage at the detector should be slow enough to prevent large transient currents through the coupling capacitor into the input. This is normally provided for by a high voltage RC Filtering network with components of adequate voltage rating.
In general, it is important to avoid high voltage discharge in any part of the circuit.
EXAMPLE:
Where typically R1, R2 > 1 M
R3 optional additional protection to limit input current, usually less than 1 k.
The A111 will respond to a negative pulse of 8 x 10-15 coulombs or greater. The threshold may be increased by the connection of a resistor between Pins 7 and 8. Approximate values are given in Figure 1, “Threshold vs. Rt” under Specifications.
While this device is optimized for negative input pulses, it will respond to positive input pulses greater than approximately 2x the negative threshold. Because the specifications provided herein apply to negative input, the user should measure all relevant operating characteristics for any positive-input applications.
The A111 can be tested with a pulser by using a small capacitor (usually 1 or 2 pF) to inject a test charge into the input. The unit will trigger on the negative-going edge of the test pulse, which should have a transition time of less than 20 ns. This negative going edge should be followed by a relatively flat part of the waveform so that it appears as a step function. For example, a square wave is a good test waveform. (When using a square wave, it should be noted that the unit will respond to the positive-going edge also, at amplitudes above 2x threshold.) Alternately, a “sawtooth” waveform or a tail pulse with long fall time (> 1 µs) may be used.
Typical test circuit
Trise: < 20 ns (negative-going edge)
Amplitude: 500 mV/picocoulomb; 4 mV at the nominal threshold.
Charge transfer to the input is according to Q = Ct·V, where Q = total charge, Ct = value of test capacitor, and V = amplitude of voltage step. DO NOT connect the test pulser to the input directly or through a large capacitor (> 100 pF) as this can produce a large current in the input transistor and cause irreversible damage.
Output
The output circuit of the A111 is a PNP transistor with a 6 kohm collector load to ground:
This circuit directly drives CMOS inputs with wide voltage swing and thus excellent noise immunity. The high value (6 kohm) load resistor minimizes both internal ground currents and power consumption in critical applications. In applications where load capacitance is significant and high count rate performance is important, the addition of an external resistor Rx from Pin 5 to ground will shorten the fall time of the output pulse. A typical value for load capacitance of 10 to 50 pF, is 2 kohm. At the expense of pulse amplitude, low impedance circuits may be driven, e.g. terminated coaxial cable. For example, terminated 50 ohm cable can be driven with a pulse amplitude of 1.4 V (Vs = 5 V).
To interface the A111 directly with TTL, a value for Rx must be chosen to sink the required low level input current of the TTL device. For example, for low power devices requiring Iin = 0.4 mA at 0.4 V, the maximum value for Rx in parallel with the 6 kohm is 1 kohm. For devices requiring more than 2 mA current sinking, an inverting NPN transistor interface between the A111 and the input is recommended.
Line Driver for A111
Additional Threshold Adjustment
A) Increasing the Threshold of the A111:
Increasing the threshold of the A111 beyond the 10x provided by shorting out Pins 7 and 8 can be achieved by an RC feedback as shown.
Apart from unit to unit variation, the discrimination levels will be as follows:
-
- Shorting out Pins 7 and 8 will result in 10x increase of nominal threshold: (5 x 104 electrons) x 10 = 5 x 105 electrons.
- Shorting out Pins 7 and 8 plus feedback:
R = 50 k C = 2.2 pF : 17x
R = 20 k C = 3.3 pF : 23x
R = 5 k C = 4.7 pF : 40x
R = 2 k C = 6.8 pF : 88x
Intermediate values can be obtained by adjusting the value of R.
B) Decreasing the Threshold of the A111:
Decreasing the threshold of the A111 beyond the nominal 5 x 104 electrons can be achieved by adding a resistor from Pin 8 to ground. A 300 ohm resistor will approximately double the sensitivity resulting in a threshold of 2.5 x 104 electrons.