Circuit Layout
Due to the high sensitivity and ultra low noise of the A225, care should be taken in circuit layout. The PC-25 Test Board may be used as an example of appropriate layout technique. In general, ground plane construction is recommended. Input and output lines should be kept well separated and in most cases shielding will be necessary. Particular attention should be paid to the detector ground connection to avoid oscillation due to feedback. The supply voltage is internally decoupled. While this is normally adequate, in some applications external bypassing may be helpful.
To facilitate noise minimization in certain applications, two separate ground connections are provided. Pin 4 is the ground connection for the input stage and is also connected to the case. Pin 5 is ground for the remainder of the circuit. In most applications Pins 4 and 5 may be connected to the same ground (preferably a ground plane under the unit) along with Pins 2,3,6,7,9,10 and 13.
The A225 may also be used in applications where the input from the detector is positive by connecting Pin 5 (output ground) to a negative supply voltage instead of ground. This voltage can range from 0 to -10 V. A negative output pulse at Pin 8 will result from a positive input. The dynamic range in this case will be approximately 0.5 Volts greater than Pin 5. For example, with Pin 5 operated at -5 Volts, negative pulses of up to 5.5 Volts amplitude can be obtained. This mode of operation will result in increased operating current. The A225 is not specified in this mode and critical parameters should be verified by the user.
Power Supply
While specifications are given for operation at +5 V, the characteristics of the A225 are relatively unaffected by changes in supply voltage from +4 to +25 VDC. Parameters critical to a particular application should be checked at the actual operating voltage.
Input
In order to minimize noise, the A225 input (Pin 1) has no internal protection. External protection may be added to Pin 1 by connecting two back-to-back diodes to ground.
Typical Protective Circuit
Figure 4. Protective circuit for the A225.
NOTE: The input protection circuit provides a limited amount of protection against transients generated in the detector and bias network. Any circuit capable of providing absolute protection would cause intolerable degradation of noise performance. For this reason, care must be exercised in the use of any preamp with high voltage detectors. Specifically, damage may result from detector breakdown, breakdown of the high voltage coupling capacitor or other component, excessively rapid rise or fall of detector bias voltage, or the addition of uncharged capacitance across the input with bias voltage applied.
In some applications, increased protection will justify an increased noise level. In this case, a resistor may be added in series with the input – normally a few hundred ohms will suffice.
Test Circuit
The A225 can be tested with a pulser by using a small capacitor (usually 1 to 2 pF) to inject a test charge into the input. The unit will respond to the negative-going edge of the test pulse, which should have a transition time of less than 20 ns. This negative going edge should be followed by a relatively flat part of the waveform so that it appears as a step function. For example, a square wave is a good test waveform. (Keep the square wave frequency low enough that the response to the positive-going edge can be ignored.) Alternately, a “sawtooth” waveform or a tail pulse with long fall time (> 100 µs) may be used. Charge transfer to the input is according to Q = Ct · V, where Q = total charge, Ct = value of test capacitor, and V = amplitude of voltage step. DO NOT connect the test pulser to the input directly or through a large capacitor (> 100 pF) as this can produce a large current in the input FET and cause irreversible damage.
Typical Test Circuit
A225 Test Circuit
Negative going pulse
Rise Time < 20 ns, fall time > 10 µs, or square wave.
Amplitude: 22 mV = 1 MeV (Si)
EXAMPLE: To simulate 1 MeV in silicon detector:
1 MeV (Si) = 0.044 pC
Ct = 2 pF
V = Q / Ct = 0.044 pC / 2 pF = 22 mV
i.e. a 22 mV step into 2 pF test capacitor simulates 1 MeV in silicon.
Outputs
Pin 8
The shaping amplifier of the A225 produces a unipolar pulse at Pin 8 suitable for high resolution, high rate pulse height analysis. This output has an AC impedance of approximately 30 ohm and will drive 1 kohm loads as well as several feet of unterminated cable. In applications requiring highest linearity, load resistance should be greater than 5 kohm. This output has a quiescent D.C. output level, or Baseline, of approximately 0.8 V. In most applications the pulse should be capacitively coupled to external circuitry.
Pin 12
The output at Pin 12 is a timing pulse with an unloaded risetime of approximately 20 ns and a falltime of 2.8 µs capable of driving a load of 500 ohm. This output has approximately the same linearity characteristics as the shaped output at Pin 8. Grounding this Pin could damage the unit.
Compensation
The A225 is internally optimized for detector capacitance up to approximately 50 pF. In applications with large detector capacitance and requiring short timing pulse risetime, a compensation capacitor from 0 to 250 pF may be connected from Pin 14 to ground. The exact value should be experimentally determined with the detector connected to the input. Note that this compensation will not normally be necessary if the timing pulse is not used, or its risetime is not critical.
Bipolar Pulse
In applications requiring a bipolar pulse, the unipolar output can be differentiated with an RC differentiator. The time constant should be approximately 1.8 µs, suggested values are: C = 1 nF, R = 1.8 kohm. In most cases this pulse should be buffered in order to drive subsequent circuitry.
A225 Overload Characteristics
The A225 can be operated at high supply voltage (Vs = +25 VDC) in order to maximize the dynamic range and hence minimize the overload conditions. Furthermore, Pin 5 can be connected to a negative supply up to -2 VDC to further decrease the overload recovery time.
Up to 100 MeV (Si) or 500 picocoulomb can be analyzed with the A225 without overloading the unit, resulting into a dynamic range of 40,000.
The X10 overload characteristics of the A225 are: < 20 µs @ Vs = +25 VDC and < 40 µs @ Vs = +5 VDC.
Inverter for the A225/A206 when Detector Signal is Positive
A225 Adjustable Sensitivity
The sensitivity of the A225 can be reduced by adding the following external network:
Example: C=10 pF; R=300 kohm will reduce the sensitivity by a factor of 10. R will have to be adjusted for the individual detector load so that no overshoot occurs on the output pulse.
IMPORTANT: An equivalent detector load (typically 150-200 pF) must be present from Pin 1 to ground in order to stabilize the loop and reduce high frequency oscillation on the output pulse.
A225 Input and Output Protection
This note is intended as a guide in the use of the A225 to prevent damage due to overstress of input or output circuitry.
Input Protection
Input protection is described above. Please read that section carefully. The A225 input connects directly to the gate of a sensitive field effect transistor (FET). In general, any large, rapid change in voltage in the detector circuit can cause excessive input currents to flow and must be avoided. Such transients can be caused by the breakdown of the detector or the coupling or filter capacitor. Also, raising or lowering the detector bias voltage too quickly can have the same effect. The following procedures should be followed to ensure safe operation of the unit.
- Check the circuit for potential breakdown problems, such as inadequate capacitor or detector voltage ratings and areas where corona discharge or direct shorts might occur.
- Make sure that the detector bias voltage is applied slowly enough that excessive currents will not flow through the coupling capacitor into the input. This can be achieved by using a filter with a sufficiently long time constant.
- If noise considerations permit, use a protection network at the input as described above. Use fast, low capacitance diodes. The Siliconix PAD-1 diode is a JFET connected as a diode and works well in this application. Use a series resistor if possible.
- To minimize the energy which can be dissipated at the input in the event of a breakdown, do not use a coupling capacitor of much larger value than necessary. 1 nF is adequate in many applications.
Output Protection
In order to maximize pulse drive capability, the output of the A225 is not current limited. This is not normally a matter of concern because external capacitive coupling protects the output stage from excessive current flow in the event of a short or an attempt to drive a low impedance load, such as a terminated 50 ohm line. Such capacitive coupling normally must be used anyway between the A225 and subsequent circuitry to remove the D.C. component from the output signal. The A225 output may be damaged by shorting to ground or connection to a low impedance node of the circuit. The following guidelines should help prevent such damage.
- Place the output coupling capacitor close to Pin 8 so the direct output has minimum exposure to accidental shorts.
- If it is desired to use the direct output without capacitive coupling, place a 100 ohm resistor in series with the output close to Pin 8. This will prevent damage in the event of a short.
- If connection is made directly to Pin 8 (for example, to view the direct output with an oscilloscope), take care to avoid shorts.
- When using the PC-25, the direct output is available at a post (“OUTPUT”). Care should be exercised to prevent shorts, and capacitive coupling should be used to connect to external circuitry.